1. Field of the Invention
The present invention relates to nonvolatile memory devices, and more particularly to an improved nonvolatile memory based on floating gate transistors with fast programming.
2. Description of Related Art
Flash memory is a class of nonvolatile memory integrated circuits, based on floating gate transistors. The memory state of a floating gate cell is determined by the concentration of charge trapped in the floating gate. The operation of flash memory is largely dependent on the techniques used for injecting or removing charge from the floating gate.
Low power consumption, adaptability to low voltage operation as well as fast write and read constitute the desirable features for high density flash memory to be used as mass storage media in portable systems.
Much effort has been devoted to developing high density and high performance flash memory. However, there still remain some important aspects to be improved. Two of them are low voltage operation and high program/erase PGM/ERS cycling endurance. Flash memories generally use Fowler-Nordheim (FN) tunneling to inject and emit electrons through tunnel oxide. This means that a high electric field is required for flash memories to achieve high PGM/ERS speeds, and high voltages are needed at least inside the chip. Both high field and high voltage requirements go against low voltage operation and high PGM/ERS cycling endurance.
There are drawbacks associated with all of the various prior art program PGM operation schemes used to inject electrons into the floating gate. Channel Hot Electron Injection (CHEI) requires high current, high power, and causes a hot hole injection (HHI) issue for over-erased cells. Drain Avalanche Hot Carrier (DAHC) is low speed, and suffers a HHI induced reliability issue. Fowler-Nordheim (FN) tunneling suffers a speed/reliability trade-off. High speed leads to severe stress and reliability degradation due to the high fields. Channel FN tunneling suffers the disadvantage that substrate HHI cannot be avoided under increasing FN current. Edge FN tunneling suffers band-to-band tunneling BBT induced HHI which leads to critical reliability issues.
Accordingly, it is desirable to provide a flash memory cell design and operating technique which increases the speed and efficiency of programming of a floating gate memory array, in order to improve the overall performance of the device. Furthermore, it is desirable that the flash memory operating technique be suitable for low supply voltages.